INTRODUCTION
When we open the case of a Solid State drive (SSD), we find a complete system inside. Human eyes can only see the physical part of it - the hardware (HW) part. The other part that made up the SSD, is the set of instructions code embedded onto the board that guides the operation of the SSD, which is called firmware (FW). The firmware is also crucial in the drive.
Let’s start from what we can immediately see with our eyes on the SSD system board. A simplified block diagram of a typical SSD’s hardware is shown in the image below. The physical key components of an SSD are the controller that serves as the brain (processor) of the SSD on the board, and memory to store the data. Of course, there are several NAND Flash memory chips attached on the system board. It is also common to find other components such as:
- direct-current-to-direct-current (dc–dc) converters to derive all the necessary internal power supplies.
- quartz crystals for high precision clocks.
- filter capacitors for filtering power supplies.
- a network of temperature sensors for power management (for instance, if the temperature becomes too high, performances can be throttled not to exceed SSD’s power budget).
- fast DRAM components that are used for data caching: when the host system issues a write operation to the drive, data are actually first cached to reduce the transfer time seen by the host, and then copied to the Flash subsystem.
The Controller is an embedded processor on the SSD system that executes firmware-level code and is one of the most important factors of SSD performance. Controller is included in every SSD in order to incorporates the electronics that bridge the NAND memory components to the host computer. At a very high level, the SSD’s controller (or simply Flash controller) needs to take care of the following operations:
- communication to/from the system host.
- communication to/from the Flash subsystem by using the selected electrical interface and protocol (e.g., ONFI or Toggle).
- communication to/from DRAM subsystem.
- read/write performances.
- data integrity during all data transfers, and retention of the stored non-volatile information (which is very sensitive to temperature).
Activities of Flash controller components can be grouped into six modules, which can be implemented either in hardware or in firmware, depending on design choices and target performances.
A simplified block diagram of a typical SSD
Image Credit: IEEE Xplore (https://ieeexplore.ieee.org/document/7885160)
- Host Interface (PCIe, SATA, NVMe, etc.):
The first module connects the SSD to the host system (host interface in the block diagram above). In other words, it enables the connection between the host (e.g computer) and SSD based on the selected interface protocol (e.g., PCIe, SATA, NVMe, etc.), thus ensuring both logical and electrical interoperability. Usually, this block is made of hardware (e.g., buffers, drivers, etc.) and firmware (e.g., one of the >Cores is used to decode the command sent by the Host). - Flash Interface:
After the firmware instructions from host commands are decoded, the second module, the Flash interface, kicks in. In essence, this second module translates all the decoded commands into low-level instructions for the NAND subsystem. Again, the controller needs to guarantee the electrical interoperability with NAND devices. The two most popular commercial NAND protocols are called ONFI and Toggle, and they are capable of transferring data in DDR mode up to 800 MB/s (1 GB/s and beyond might be possible in future generations). - DRAM Interface:
Another electrical interface that needs to be handled by the Flash controller is the one toward DRAM components, which is mainly used for data caching and for storing the mapping tables required by the flash translation layer - FTL (check below for an explanation on FTL). - Flash File System (FFS):
The main goal here is to make the SSD look like a standard HDD to the host machine, main reason being the possibility of reusing all the existing applications, not necessarily developed having in mind the specific properties of the solid-state storage. Typical FFS implementation is firmware (FW) based, as sketched in the diagram above. There are four main FW layers: Flash translation layer (FTL), wear leveling, garbage collection, and bad block management.- Flash Translation Layer (FTL): The Flash Translation Layer is usually in charge of how to handle the specific characteristics of flash memory. The objective of the FTL driver is to provide transparent services for file systems to access flash memory as a block device.
- Wear leveling: If a particular block is programmed and erased repeatedly without writing to any other blocks, that block will wear out before all the other blocks - thereby prematurely ending the life of the SSD. For this reason, SSD controllers use a technique called wear leveling to distribute writes as evenly as possible across all the flash blocks in the SSD.
In a perfect scenario, this would enable every block to be written to its maximum life, so they all fail at the same time. The process to evenly distribute writes requires data previously written and not changing (cold data) to be moved, so that data which are changing more frequently (hot data) can be written into those blocks. Relocating data increases write amplification and adds to the wear of flash memory. Designers seek to minimize both.
NOTE: Block is a group of cells used to store data in SSD - Garbage Collection: Wear leveling needs a pool of “free” (i.e., erased) blocks. When the population of this pool goes below a threshold, a firmware layer called garbage collection takes over. This algorithm selects the block that needs to be erased based on a predefined cost function; it copies the entire content to a different block, and then it triggers the erase operation such that the block can be moved to the list of available blocks. Usually, garbage collection is a background operation to avoid any performance (throughput and latency) hit.
- Bad Block Management (BBM): The fourth firmware layer takes care of the so-called bad blocks (BB). These blocks contain unreliable cells and, therefore, cannot be used to store data. NAND Flash devices contain BBs when they are shipped from the factory, but new bad blocks can pop during SSD’s lifetime, as a result of failures during either programming or erasing. Bad Block Management keeps track of BBs in a dedicated list, which has to be non-volatile. In fact, this list has to be retrieved at every boot of the drive (power-up) to avoid storing user data inside unreliable memory cells.
- Error Correction Code:
This module inside the Flash controller is the one responsible for performing the error recovery. Historically, Bose–Chaudhuri–Hocquenghem (BCH) code has been the code used to enhance NAND reliability, mainly because its hardware implementation is relatively simple. Most recently, low-density parity-check (LDPC) codes have caught a lot of attention because they can get much closer to the Shannon limit. With Flash technology moving to high 3-D stacks and QLC in recent years, the possibility of correcting more errors becomes very attractive. LDPC codes leverage complex algorithms, require more logic gates, and, therefore, consume more power. Therefore, there is a big research activity in this space trying to find the right trade-off between correction performances and hardware cost. - Media Management:
By using the word media, it means either NAND Flash or any other emerging non-volatile memories (e.g., ReRAM, MRAM, etc.). Given the fact that LDPC codes are approaching the Shannon limit, there is not so much space left for improving the SSD’s lifetime by “simply” increasing the number of errors that the Flash controller can recover. As a result, there is the need for reducing the bit error rate (BER) growth rate such that the ECC maximum correction capability is reached at a higher count of program/erase cycles. The media management module is also in charge of executing Flash Signal Processing.
HOW SSD FUNCTION
SSD have very different modes of writing and reading data from the traditional hard drives that has electromechanical parts inside it. SSD depends on flash memory chips to store data, it does not contain moving parts.
There is an installed complex firmware instruction in each flash controller of SSD that deals on how data are been stored in flash memory. Flash arrays start from the so-called erased state where all bits are set to “1”. Write operations can change the state of each single bit to “0”. In other words, writing is selective at the bit level. Unfortunately, the same operation cannot be stated for the erase operation, i.e., the operation that brings the digital value back from “0” to “1”: erase can only act on group of cells called blocks. The whole Flash memory array is split into thousands of blocks, and each of them is made by hundreds (or thousand) of pages. Read and write operations work on pages, in the sense that the user read and write data patters in parallel. Because of this unique storage functionality, a “simple” page update is actually not that simple. In fact, a page update implies changing some of the bits from “0” to “1” and this operation, in Flash terms, means erasing. The point is that a single erase operation involves multiple pages, and it can take several milliseconds to complete. Because it would take too long, what actually happens is that the updated page gets written to a different memory location and the original page (i.e., the page that needed to be updated) gets invalidated. As a consequence, there is a mismatch between physical and logical page addresses. This misalignment can be fixed by using tables to store the logical-to-physical mapping, and this is the so-called Flash translation layer (FTL). The number of tables can be huge, and it can have a significant impact on the effective SSD’s storage capacity, if it is not carefully designed.
How does SSD store data || Inside the Engineering of Solid-State Drive Architecture
Video credit: Branch Education!
With all these functionalities on data manipulation happening inside the flash memory, an SSD means data is written, transferred, and erased electronically and silently.
The memory chips on an SSD are now comparable to random access memory (RAM). Instead of a magnetic platter, files are saved on a grid of NAND flash cells, and each grid (or block) can store between 256 KB and 4 MB. The controller of an SSD has the exact address of the blocks, so when the computer requests a file, it’s available almost instantly. SSDs can access memory within nanoseconds. With SSDs, you don’t have to wait for a read/write head to find the information it needs.
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